CHARACTERISTICS OF

ULTRA-HIGH POWER TRANSISTORS

by

Applications Engineering Staff

POWERTECH, INC.

0-02 Fair Lawn Avenue - Fair Lawn, NJ 07410

Presented at First National Solid-State Power Conversion Conference

Beverly Hills, California - March 20, 21, 22, 1975

ABSTRACT

Production of extremely high-current(50A-1200A) and high-voltage silicon power transistors presents unusual fabrication problems. These include: obtaining a uniform, defect-free junction over large-area silicon wafers; providing reliable, ultra-low-resistance electrical connections; and high-current testing of devices in pre-assembly form.

This paper describes a development and manufacturing program that has resulted in the capability of supplying devices virtually "off the shelf" for a variety of applications that were formerly reserved for SCR'S. Use of these transistors helps to increase the reliability of systems, while providing a reduction in circuit complexity and space. Recognition of the importance of "Safe Operating Capabilities" for large-area devices is a key factor in their effective usage, and the various tradeoffs necessary in building devices with high "Safe Operating Areas" must be evaluated by the circuit designers who will use them.

Introduction

In the late 1950's and early 60's, it was realized that the transistor would be playing an increasingly important role in the electronic industry, and that it was no longer a "State-of-the-Art Device" to be used only in exotic circuits. At that time, it also became evident that miniaturization of electronic systems was well within practicality. Utilizing these new devices, engineering design objectives placed more importance on space and weight reduction as well as on reduced circuit complexity. Shortly thereafter, integrated circuit designs contributed to the greatest miniaturization ever. Unfortunately, the power supplies of many systems did not shrink proportionately with other sections of the system. It was, therefore, inevitable that designers would soon improve the power supplies for both increased efficiency and reduced space and weight.

In order to improve a power supply's overall efficiency, switching-regulated supplies have been replacing linear-regulated supplies in many areas, and today switching regulation can even be found in the common variety laboratory supply. Some of these switching supplies have been using SCR'S, but with the increasing availability of high-current, fast-switching power transistors, the trend is definitely toward their usage for these circuits.

For purposes of this discussion, we are confining ourselves to single-chip transistors operating in the range of 50 to 500 Amperes and capable of holding off from 60 to 400 Volts. We are limiting our discussion to this range because there are many devices presently on the market that are capable of handling currents below that range. Since transistors such as these are used for switching and not for dissipating power, it is desirable to discuss them in terms of their current and voltage capabilities or switched power capabilities instead of in terms of power dissipation ratings, which imply that the transistor is expected to dissipate great amounts of power. In fact, because of the low Saturation Voltage, VCE(sat), the transistors discussed here generally operate well below their maximum power ratings. Additionally, the term "Current State of the Art", as associated with these transistors, has been avoided since it has connotations of limited-production, low-yield technology. In developing the product line described herein, no major breakthroughs were made. Success in producing ultra-high-current transistors was achieved simply by applying existing engineering technology to the satisfaction of specific requirements for high-current capability.

The design objectives established at the start of the program were to produce a transistor capable of reliably switching 100 Amperes, by a process that would be both reproducible in volume and high in yield.

For this type of device to be useful to the designer, it must operate with efficiency. To operate efficiently, it must have a low voltage drop when fully on; in other words, it must have a low Saturation Voltage, VCE(sat). It also must be rugged, since it will be expected to switch highly inductive loads. We measure ruggedness in terms of Safe Operating Area (SOA) and ES/b (reverse-biased second breakdown), the limit for which can be as high as 6 Joules in an unclamped inductive switching test circuit. (Figure 1 ).

Figure 1 - Unclamped Inductive Sweep Test

When this device was in the design stages, there were many highly efficient manufacturing techniques available, such as epitaxial and planar methods of forming junctions, aluminum metalization, and thermocompression bonding techniques for making electrical connections. Many of these techniques were considered but eliminated because, although they were readily adaptable to low-current devices and high-volume production, they could not produce the optimum design for high-current applications. Instead, a widely used diffusion technique called single diffusion, and a unique metalization scheme using copper were selected. To facilitate high-volume production, transistors were built one per wafer.

Since transistors inject carriers mainly along the periphery of their emitter fingers, it follows that the greater the total periphery, the higher the gain a particular transistor will have at a specific operating current level. A transistor designer will, thus, normally strive to maximize the emitter periphery per unit area of silicon, in order to achieve the highest current gain (hfe) at a specific current level. In order to ensure that these transistors would have the greatest possible safety margin, even though they would not normally be expected to dissipate great amount of power, they have been designed to be able to dissipate substantial power and, thus, have low thermal resistance. It is for this reason, among others, that the chip area has been made large, and that the emitter periphery per unit area was not optimized. Limitation of total periphery is the tradeoff that must be made because of the constraints of photolithography and metalization techniques. Most transistor manufacturers use aluminum metalization, since it has many attractive advantages; among these are ease of application by vapor deposition and ease of definition by photolithography.

A major problem with aluminum is that only a thin layer can be applied by normal vapor-deposition techniques. Thus, when high currents are applied along the emitter fingers, a voltage drop occurs along them, and the injection efficiency on the portions of the periphery that are furthest from the emitter contact is reduced. This limits the amount of current each finger can conduct.

If copper metalization (Figure 2) is substituted for aluminum, then it is possible to lower the resistance from the emitter contact to the operating regions of the transistors (the emitter periphery). This will help to keep all areas of the emitter periphery injecting at the same level. Our device successfully utilizes a relatively thick copper grid which makes contact with the entire emitter as well as the base. Since copper is an excellent conductor, all areas of the emitter are at the same potential and working well, which is why the high current capability is achieved. The effectiveness of this copper contact manifests itself by the extremely low Saturation Voltages, VCE(sat), that are obtained at high currents. In general, Saturation Voltages of these devices are well below one Volt at anywhere between 50 to 300 Amperes (Figure 3).

Figure 2 - Copper Metalization

Figure 3 - Saturation Voltages

This quality of metalization also allows the devices to have uniform current densities throughout the active regions. This is particularly important for second-breakdown (SOAR) capabilities. While particular transistors may have usable (Figure 4) current gains at high currents, in order to effectively utilize the device, they must also have the capability of being switched through their active region without being destroyed. In the active region, the transistor will see short periods of a combination of high current and high voltage, which will result in high peak power levels. This occurs while the transistor is being switched from on to off, or vice-versa. Whether or not the transistor will be useful in a given circuit will be determined by its ability to withstand this combination). This ability can be shown in terms of the device's forward safe operating area.

Figure 4 - Safe Operating Area

Ability for the transistor to switch high currents reliably is thus determined by its peak power handling capabilities. This ability is dependent upon the transistor's current and thermal density throughout the active region. in order to optimize the Safe Operating Area capability, the current density and thermal density must be low. (This raises the level at which hot spots form). In general, it is the hot spots occurring at the weakest area of the transistor that will cause a device to fail due to second breakdown phenomena. A wide base width will limit the current density across the base region, while good heat sinking directly under the collector will enable the transistor to withstand high peak power. When the power and heat are spread over a large silicon area, all of these destructive tendencies are held to a minimum, and the transistor will have the highest Safe Operating Area capability.

Since high safe operating capability is an extremely desirable factor, and probably the most important, it was decided that a large area device was necessary. A silicon wafer with a diameter of 570 mils was used in order to achieve an outstanding SOAR while at the same maintaining a good production yield. As one might guess, the key to success is to produce a large-area junction free from defect, as well as to be able to effectively solder the silicon to a suitable heat sink. Since this is not an easy task, an intermediate step is used (Figure 5). It is difficult to solder a large-area silicon device to copper without the silicon cracking due to thermal mismatch. To avoid this, a molybdenum slug was placed between the silicon and the copper. The molybdenum matches the thermal coefficient of expansion between the silicon and the copper. Both the molybdenum and the copper are brazed, and the silicon is soldered to the molybdenum afterwards. The most critical junction in the entire operation is the void-free junction between the silicon and the molybdenum. Since this is the first Interface between the silicon and the outside world, it is of utmost importance that this junction be of high enough quality so that uniform current and thermal density will ensue. This will limit hot spot generation under the silicon and provide an exceedingly high Safe Operating Area capability.

Figure 5 - Intermediate Step

The modular approach seems to be the most effective method of manufacturing large-area devices, since after the module is assembled, the device can be tested for its Safe Operating Area capabilities, as well as its high-current static characteristics. At this point, those units successfully passing the SOAR test are categorized and inventoried. This technique provides us with the flexibility to place the module in any package or supply the module alone as a complete transistor for hybrid circuits. This modular technique is extremely cost effective since it allows us to only assemble into packages those transistors that we know to be of the highest quality. Since high-current packaging is expensive, this is quite an asset.

Single-Diffused Technique vs. Triple-Diffused

The majority of these devices utilize the single-diffused process. This process allows the device to have the widest base width of any known diffusion technique. While the greatest benefit is the highest possible SOAR capability, this diffusion technique limits the switching speed capability of the device to circuits operating below 10 kHz at voltage ratings to 250 Volts or less. For many circuits, however, such as PWM motor controls and static inverters, switching at 400 Hz to 1 kHz is highly desirable, and because of high inductive loads in the circuits, inherent ruggedness in the transistor is most important. The single-diffused technique yields the most inherently rugged device available.

Many design engineers are not aware of this switching speed vs. ruggedness trade-off, utilizing fast devices when they are not necessary, and unknowingly sacrificing overall reliability.

High Voltage

The latest and most interesting product in the high-switched-power area is a high-current, high-voltage transistor. In order to obtain high voltage capability and, at the same time, be able to switch high currents, some tradeoffs must be made. The major tradeoff is to substitute a triple-diffused manufacturing process for the single-diffused process. This produces a sacrifice in second breakdown characteristics and results in a more difficult device to produce. The greatest production difficulty arises from the narrower base widths required and the additional junction complexity due to extra diffusions. As with the other products, there are no major technological breakthroughs since the triple-diffused techniques (Figure 6) are well known and used by many semiconductor manufacturers. The difficulty arises because of the large junction areas involved. Because metalization and basic chip design plays an important role in second breakdown capability, the degradation, due to the change in diffusion process, is not as severe as might be expected.

Figure 6 - Triple-Diffused vs. Single-Diffused Techniques

There are many applications for high-voltage transistors. These applications were formerly dominated by either SCR's or paralleled low-current transistors; however, the high-current, high-voltage transistors offer high frequency capabilities (typical rise and fall times are in the order of 500 ns.), which can greatly improve circuit performance; hence they are most desired. Additionally, when used for line-regulated power supplies, they eliminate the transformer that was previously necessary. This reduces weight, space, and circuit assembly costs. It can be anticipated that the high-voltage transistors will turn out to be one of the most useful semiconductor devices for switching power, and I would expect that an increasing effort by other power semiconductor manufacturers will be directed towards this area. In the future, our company expects to produce high-current devices with switching capabilities up to 600-700 Volts while maintaining 50 to 100 Ampere capabilities. These devices will continue to replace SCR's since their circuitry is much simpler than the SCR's circuitry for DC circuits.

Summary

In conclusion, it should be evident that devices capable of switching extremely high currents and high voltages are a reality, and that there is nothing "State of the Art" about them. Whereas no new major technological breakthroughs occurred to produce devices such as these (the basic technology is approximately 10 to 15 years old), I feel confident that in the next 10 years, we can expect to see a major technological breakthrough in the power conversion field which will at least double the capabilities of these devices.

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